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COMe-P2020 User Guide
52
Table 3-23: 0x013: UFM/CPU Control and Status Register
ACTION D7 D6 D5 D4 D3 D2 D1 D0
READUfmBusy000000 0
WRITENUNUNUNUNUSel2Sel1RstUfm
POWER UP0000000 0
BITFIELD DESCRIPTION
[D0] RstUfm Reset CPU and read User Flash Memory Configuration:
'0' = no Read
'1' = Resets CPU and starts Reading of UFM User configuration (bit is set by register access and
self cleared by CPLD)
[D7] UfmBusy UFM status bit, UFM command (Erase, read or write) is in progress, if bit is High any UFM access
is NOT allowed:
'0' = no command
'1' = UFM command is in progress
Table 3-24: 0x080: POST Code Low Byte Register
ACTION D7 D6 D5 D4 D3 D2 D1 D0
READ POST_Code_Low_Byte[7:0]
WRITE POST_Code_Low_Byte[7:0]
POWER UP0000000 0
BITFIELD DESCRIPTION
[D0-D7] POST_Code_Low_Byte[7:0] POST_Code_Low_Byte Register
Table 3-25: 0x081: POST Code High Byte Register
ACTION D7 D6 D5 D4 D3 D2 D1 D0
READ POST_Code_High_Byte[7:0]
WRITE POST_Code_High_Byte[7:0]
POWER UP0000000 0
BITFIELD DESCRIPTION
[D0-D7] POST_Code_High_Byte[7:0
]
POST_Code_High_Byte Register
Table 3-26: 0x084: Debug Low Byte Register
ACTION D7 D6 D5 D4 D3 D2 D1 D0
READ Debug_Low_Byte[7:0]
WRITE Debug_Low_Byte[7:0]
POWER UP0000000 0
BITFIELD DESCRIPTION
[D0-D7] ]Debug_Low_Byte[7:0] Debug_Low Byte Register
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