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COM Express Interfaces
Figure 14: PCIe Mini Card Reference Circuitry
A PCI Express Mini Card schematic example is shown in Figure 14 above. The reference clock
pair is sourced from the zero delay clock buffer shown earlier in Figure 6 'PCIe Reference Clock
Buffer' on page 35 above. The clock pair is enabled when the PCI Express Mini-Card pulls its
CLKREQ# pin low.
The example shows COM Express PCIe lane 1 and USB port 0 used, but other assignments
may be made depending on Module capabilities and the system configuration.
If Suspend mode operation is not required, then the 3.3VAUX pin may be tied to VCC_3V3. The
WAKE# pin should be left open in this case.
2.3.5.8. ExpressCard
ExpressCards are small form factor hot-swappable peripheral cards designed primarily for
mobile computing. The card’s electrical interface is through either a x1 PCIe link or a USB 2.0
link. Per the ExpressCard source specification, the host interface should support both the PCIe
and USB links. The ExpressCard device may utilize one or the other or both interfaces.
There are several form factors defined, including: 34mm x 75mm; 54mm x 75mm; 34mm x
100mm, and 54mm x 100mm. All of the form factors use the same electrical and physical socket
interface.
ExpressCards are the successor to Card Bus Cards (which are PCI-based). Card Bus cards, in
turn, are the successors to PCMCIA cards. All three formats are defined by the PCMCIA
Consortium.
The source specification document for ExpressCards is the ExpressCard Standard.
COM Express includes four signals that are designated for the support of two ExpressCard slots:
PICMG
®
COM Express
®
Carrier Board Design Guide Rev. 2.0 / December 6, 2013
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VCC_3V3_SBY
VCC_1V5
PCIE_CLK_REQ0#
CEX
PCIE_TX1+
CEX
PCIE_TX1-
SMB_CK_S0
SMB_DAT_S0
CEX
USB0+
CEX
USB0-
CEX
PCIE_RX1+
CEX
PCIE_RX1-
CEX
WAKE0#
CEX
PCIE_RESET1#
PCIE_CLK_REF0+
PCIE_CLK_REF0-
C9
4.7uF
C8
100n
C11
4.7uF
C10
100n
PCIe Mini-Card Connector
J3
PCIe Mini-Card Connector
W_DISABLE2#
51
RSVD2
49
RSVD3
47
RSVD4
45
GND
43
41
39
37
GND
35
PET0+
33
PET0-
31
GND
29
GND
27
PER0+
25
PER0-
23
GND
21
UIM_IC_DP
19
UIM_IC_DM
17
GND
15
REFCLK+
13
REFCLK-
11
GND
9
CLKREQ#
7
COEX2
5
COEX1
3
WAKE#
1
52
GND
50
1.5V
48
LED_WPAN#
46
LED_WLAN#
44
LED_WWAN#
42
GND
40
GND
34
SMB_DATA
32
SMB_CLK
30
1.5V
28
GND
26
3.3VAUX
24
PERST#
22
W_DISABLE1#
20
GND
18
UIM_SPU
16
UIM_RESET
14
UIM_CLK
12
UIM_DATA
10
UIM_PWR
8
1.5V
6
GND
4
2
USB_D+
38
USB_D-
36
SH1
S1
SH2
S2
SH3
S3
SH4
S4
SH5
S5
SH6
S6
3.3VAUX
3.3VAUX
3.3VAUX
3.3VAUX
GND
- COM Express® 1
- Carrier Design Guide 1
- Contents 3
- 1. Preface 8
- 1.6. Name and logo usage 9
- 1.7. Intellectual property 10
- Term Description 11
- 1.10. Schematic Conventions 15
- 2. COM Express Interfaces 16
- COM Expre ss Module 17
- Type 10 17
- Table 4: Pin-out Comparison 20
- , the PCI 30
- 2.3.5. Schematic Examples 34
- Signal Pin Description I/O 45
- Figure 15: ExpressCard Size 45
- 2.4.1. Signal Definitions 48
- 2.4.2. PEG Configuration 49
- 2.4.3. Reference Schematics 52
- DisplayPort is supported 55
- DisplayPort Example 56
- Figure 21: HDMI Example 57
- Figure 22: DVI Example 59
- SDVO Port Configuration 61
- Supported SDVO Devices 62
- DVI_SDAROM 63
- DVI_SCLROM 63
- SDVO I2C Bus Address 63
- Write = 0111 0000 (70h) 63
- Read = 0111 0001 (71h) 63
- 2.6.1. Signal Definitions 66
- Earliest asserted 1ms after 68
- 3.3V, 5V and 12V are stable 68
- 2.7. LAN 70
- 2.7.2. Reference Schematics 73
- 2.8. USB Ports 76
- 2.8.2. Reference Schematics 77
- 2.9. USB 3.0 81
- 2.9.1.3. USB 3.0 connector 83
- 2.9.2. Reference Schematics 84
- 2.10. SATA 87
- Pins Signal Description 88
- SATA Port 89
- 2.11. LVDS 91
- Term Definition 94
- 2.11.2. Reference Schematics 97
- 2.12.1. Signal Definitions 99
- 2.12.2. Reference Schematics 100
- 2.13. VGA 101
- COM Express Interfaces 102
- 2.14. TV-Out 104
- COM Express Module 106
- AUDIO POWER 107
- AUDIO CODEC - ALC888 107
- ANALOG I/O CONNECTOR 107
- 2.15.1.2. AC'97 108
- Figure 41: Audio Amplifier 109
- 2.16.1. Signal Definition 111
- SUPER I/O 115
- COM1/COM2 116
- 2.17.1. Signal Definition 118
- 2.18.1. Signal Definitions 121
- 2.18.2. Reference Schematics 121
- 2.19.1. Signal Definitions 123
- 2.20.1. Signal Definitions 125
- C O M 1 C O M 2 126
- 2.21. CAN Interface 127
- 2.21.2. Reference Schematics 128
- 2.22. Miscellaneous Signals 129
- POWER ATX 133
- POWER AT 133
- Type 2 Detection 133
- 2.22.5. Watchdog Timer 137
- G P IO C o n n e c t o r 141
- 2.22.8. Fan Connector 142
- 2.22.9. Thermal Interface 143
- 2.23. PCI Bus 147
- 2.23.2. Reference Schematics 148
- 2.24.1. Signal Definitions 153
- 3. Power and Reset 156
- 3.2.1. ATX vs AT Supplies 157
- 3.2.2. Power States 157
- Power and Reset 158
- 3.2.5. Power Button 162
- 3.4. Reference Schematics 164
- Table 55: ATX Signal Names 166
- ATX Signal Name Description 166
- 3.5. Routing Considerations 167
- 3.5.3. VCC5_SBY Routing 168
- 4. BIOS Considerations 170
- Type Height Partnumber Note 171
- COM Express Module Connectors 172
- GND Plane 173
- Power Plane 173
- COM Express 175
- Table 60: Trace Parameters 176
- Symbol Definition 176
- Carrier Board 178
- Parameter Trace Routing 183
- Extended 194
- 7.2. Heatspreader 195
- (Ø2.7mm bore hole) 196
- (M2.5 thread) 196
- (Ø2.7 bore hole) 197
- Mechanical Considerations 198
- 8.3. Useful books 202
- 9.1. TV-Out 203
- 9.1.5. Signal Termination 206
- 9.1.6. Video Filter 206
- 9.1.7. ESD Protection 206
- 9.2. LPC Firmware Hub 207
- Appendix C: List of Tables 213
- Appendix D: List of Figures 215
- Table 79: Revision History 217
- Revision Date Author Changes 217
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