Kontron COMe-bIP2 Instrukcja Użytkownika Strona 80
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COMe-bIP2 / BIOS Operation
CPU Configuration
Feature Options Description
Hyper-Threading Disabled
Enabled
Enables/Disables the Intel® Hyper Threading
Technology HTT supported by Core i7/i5
Active Proc Cores
All
1
2
3
Number of cores to enable in each processors package
Execute Disable Bit Disabled
Enabled
XD can prevent certain classes of malicious buffer
overflow attacks when combined with a supporting OS
Hardware Prefetcher Disabled
Enabled
Turn on/off the MLC streamer prefetcher
Adj. Cache Line Pref. Disabled
Enabled
Turn on/off prefetching of adjacent cache lines
Intel Virtualization Technology Disabled
Enabled
When enabled, a VMM can utilize the additional
hardware capabilities provided by Vanderpool
Technology
80
- COMe-bIP2 1
- » Table of Contents « 3
- 1 User Information 6
- 1.5 Warranty 7
- 1.6 Technical Support 7
- 2 Introduction 8
- 2.5 COM Express® Benefits 9
- 3 Product Specification 10
- 3.2 Functional Specification 11
- PCH comparison 14
- Graphics Core 15
- Connectivity 16
- Misc Interfaces and Features 17
- Kontron Features 17
- Additional features 17
- Power Features 17
- 3.3 Block Diagram 18
- 3.4 Accessories 19
- 3.5 Electrical Specification 20
- 3.5.5 ATX Mode 21
- 3.5.6 Single Supply Mode 21
- 3.6 Power Control 22
- 3.7.2 Humidity 23
- WEEE Directive 24
- Conformal Coating 24
- Shock & Vibration 25
- 3.9 MTBF 26
- 3.10 Mechanical Specification 27
- 3.11 Module Dimensions 28
- 3.13 Onboard Fan Connector 30
- 4 Features and Interfaces 31
- 4.4 SPI boot 33
- Using an external SPI flash 34
- 4.5 M.A.R.S 35
- 4.6 Fast I2C 36
- Configuration 37
- Time-out events 38
- WDT Signal 38
- 4.10 Speedstep Technology 41
- 4.11 C-States 42
- 4.12 Hyper Threading 43
- 4.14 VID-x 45
- 4.17 Display Configuration 49
- DDI Design Consideration 52
- DVI-I Design Topology 52
- 3 independent Display Support 52
- Requirements 53
- Setup a Multi-monitor system 53
- 4.19 Intel® vPro™ technology 54
- 5 System Resources 56
- 5.2 Memory Area 57
- 5.3 I/O Address Map 57
- 5.5 I2C Bus 58
- 5.6 JILI I2C Bus 58
- 5.7 SDVO I2C Bus 58
- 6 Connectors 60
- 7 Pinout List 61
- 7.2 Connector X1A Row A 62
- COMe-bIP2 / Pinout List 63
- 7.3 Connector X1A Row B 64
- 7.4 Connector X1B Row C 66
- 7.5 Connector X1B Row D 68
- 8 BIOS Operation 70
- 8.3 Setup Guide 72
- 8.4 POST Codes 72
- Item Specific Help Window 73
- General Help Window 73
- 8.5 BIOS Setup 74
- Platform Information 75
- 8.5.2 Advanced 76
- PCI Subsystem Settings 77
- ACPI Settings 78
- Trusted Computing 79
- CPU Configuration 80
- CPU Information 81
- Miscellaneous 82
- Onboard I2C Bus Configuration 83
- Watchdog 84
- Smart Battery Configuration 85
- Battery Information 86
- Generic LPC Decode Ranges 87
- Thermal Configuration 88
- Passive Cooling 89
- Intel Fast Flash Standby 90
- PCH-FW Configuration 91
- Firmware Update Configuration 93
- Super IO Configuration 95
- Serial Port 1 Configuration 96
- Serial Port 2 Configuration 97
- Parallel Port Configuration 98
- H/W Monitor 99
- COMe-bIP2 / BIOS Operation 100
- Console Redirection Settings 102
- Intel ICC 103
- Clock Spread Spectrum 104
- CPU PPM Configuration 105
- 8.5.3 Chipset 106
- PCH-IO Configuration 107
- LAN Configuration 108
- SATA Configuration 109
- HDA Configuration 111
- USB Configuration 112
- PCI Express Configuration 113
- SystemAgent Configuration 115
- Graphics Configuration 116
- LCD Control 117
- - DVI-I' 118
- Memory Configuration 120
- Custom Memory Profile Control 121
- GT - Power Management Control 122
- 8.5.4 Boot 123
- Boot Option Priority 124
- 8.5.5 Security 125
- Set HDD Password 126
- 8.5.6 Save & Exit 127
- Corporate Offices 128
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